Metal oxide semiconductors (MOS) are commonly used in integrated circuits, e.g., in metal oxide semiconductor field effect transistors (“MOSFETs”). In general, MOSFETs and other MOS transistors include a source and drain separated by a channel. Flow of current through the channel is generally controlled by one or more gates. With this in mind, a MOSFET or other MOS transistor may be configured to operate in one of three regions depending on its gate-source voltage Vgs and drain-source voltage, Vds, namely the linear, saturation, and sub-threshold regions. The sub-threshold region is a region wherein the gate-source voltage Vgs is smaller than the threshold voltage Vt of the device. Vt is a voltage value (applied to the gate referenced from a source) at which the channel of the device begins to electrically connect the source and drain, i.e., at which transistor current is turned “ON.”
The sub-threshold swing (SS) of a transistor is an important characteristic which may be considered relevant to a variety of transistor properties. For example, sub-threshold swing may represent the relative ease with which a transistor may be turned “ON” and “OFF,” as well as the rate at which such switching may occur. Sub-threshold swing may be expressed by as a function of kT/q, wherein T is the absolute temperature, k is the Boltzmann constant and q is the magnitude of the electric charge.
The sub-threshold swing of many MOS devices such as MOSFETs has a lower limit of about 60 mV/decade at 300 degrees Kelvin. MOSFETs subject to that limit may be unable to switch ON and OFF faster than 60 mV/decade at room temperature. This limit may also impact operating voltage and threshold voltage requirements of a MOS device such as a MOSFET, particularly when the MOSFET is operated at a low gate-source voltage Vgs. At such voltages, the ON current of the MOSFET may be quite low, as it may be operating close to its threshold voltage Vt. Put in other terms, the 60 mV/decade limit of sub-threshold swing may limit or prevent further (downward) scaling of gate-source voltages, and thus may hinder or prevent decreasing the power requirements of a chip in which MOSFET transistors are included.
The above issue is further exacerbated by the fact that power consumption of MOSFET devices has been observed to increase as such devices are scaled down. The increased power consumption is believed to result at least in part from increased source to drain leakage currents, which in turn may be the result of small channel length dimensions that are employed such devices (i.e., short channel effects). This increase in leakage current may translate to a meaningful increase in off-current (Ioff), particularly when large numbers of MOS devices will be used in an integrated circuit device, such as a processor or other chip.
Tunneling field effect transistors (TFETs) have been proposed as a successor to MOSFETs. Among other things TFETs operate using a different physical mechanism enabling relatively low off current. Moreover, the theoretical sub-threshold swing limit of a TFET can be less than 60 mV/decade. TFETs therefore offer the potential of operating at lower gate-source voltages Vgs, relative to useful gate-source voltages for MOSFETs.
Despite those potential advantages, many TFETs suffer from relatively low “on current” Ion at a given gate-source voltage and/or “off current” Ioff. This may stem, for example, from the relatively high resistance of the tunnel barrier. Although heterojunction TFETs have shown some promise in that some have been shown to exhibit a combination of relatively high Ion and relatively low Ioff, experimental verification of these devices has yet to show sub-60 mV/dec sub-threshold swing.
Although the following Detailed Description will proceed with reference being made to illustrative embodiments, many alternatives, modifications, and variations thereof will be apparent to those skilled in the art.